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ZTL_RK3399_LPD4_MXM314

 
1、性能:ZTL_RK3399_LPD4_MXM314_20210819核心板core模块,采用 rockchip RK3399 六核 64 位处理器, 主频高达 1.8GHz,对内存占用进一步优化。
2、支持多路显示:双 MIPI、HDMI、eDP、DP 显示接口,支持双屏同显、双屏异显。
3、应用场景:VR游戏机,多功能自助终端,广告机,工业工控,车载,POS,盒子,人脸识别,智能AI等领域。
4、解码能力强:内置H264/265视频解码引擎。
6、电源管理:提供完整解决方案。
价格
0.00
类型 RK3399
产品保证
源头工厂
退换无忧
1年质保
官方正品
资料齐全
技术支持
产品详情
资料下载

RK3399核心板:引脚定义

RK3399核心板引脚定义.jpg


PinNet NamePad typeIODefual function descriptionIO Power domain



Pull

1VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
3VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
5VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
7VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
9VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
11VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
13VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
15VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
17VCC_SYSP
Input Voltage 4.8V-5.5V5.0V
19NC----
21NC----
23GNDG
GND
25GPIO3_B3/MAC_CLK/I2C5_SCL_UI/OUPRMII REC_CLK output or GMAC external clock input3.3V

_3.3V



27GPIO3_B7/MAC_CRS/CIF_CLKOUT B/UART3_TX_U_3.3VI/OUPPHY Reset3.3V
29GPIO2_B0/VOP_CLK/CIF_VSYNC/ I2C7_SCL_U_1.8VI/OUPCamera0 power down control output1.8V
31GPIO3_B5/MAC_MDIO/UART1_TX_ U_3.3VI/OUPMAC management interface data3.3V
33GPIO3_B0/MAC_MDC/SPI0_CSN1_ U_3.3VI/OUPMAC management interface clock3.3V
35GPIO0_B4/TCPD_VBUS_BDIS_D_ 1.8VI/ODOWNEDP_panel Touch panel reset output,active low1.8V
37GNDG
GND
39GPIO3_B4/MAC_TXEN/UART1_RX_ U_3.3VI/OUPMAC transmit enable , Core board internal series resistance 22R3.3V
41GPIO3_A1/MAC_TXD3/SPI4_TXD_ D_3.3VI/ODOWNMAC TX data, Core board internal series resistance 22R3.3V
43GPIO3_A0/MAC_TXD2/SPI4_RXD_ D_3.3VI/ODOWNMAC TX data,Core board internal series resistance 22R3.3V
45GPIO3_A5/MAC_TXD1/SPI0_TXD_ D_3.3VI/ODOWNMAC TX data,Core board internal series resistance 22R3.3V
47GPIO3_A4/MAC_TXD0/SPI0_RXD_ D_3.3VI/ODOWNMAC TX data,Core board internal series resistance 22R3.3V
49GPIO3_C1/MAC_TXCLK/UART3_RT SN_U_3.3VI/OUPRGMII TX clock output, Core board internal series resistance 22R3.3V
51GNDG
GND
53GPIO3_B1/MAC_RXDV_D_3.3VI/ODOWNMAC RX data valid signal3.3V
55GPIO3_A6/MAC_RXD0/SPI0_CLK_ U_3.3VI/OUPMAC RX data3.3V
57GPIO3_A7/MAC_RXD1/SPI0_CSN0I/OUPMAC RX data3.3V

_U_3.3V



59GPIO3_A2/MAC_RXD2/SPI4_CLK_ U_3.3VI/OUPMAC RX data3.3V
61GPIO3_A3/MAC_RXD3/SPI4_CSN0I/OUPMAC RX data3.3V

_U_3.3V



63GPIO3_B6/MAC_RXCLK/UART3_RXI/OUPRGMII RX clock input3.3V

_U_3.3V



65GNDG
GND
67GPIO2_B4/SPI2_CSN0_U_1.8VI/OUPSPI2_CS01.8V
69GPIO2_A0/VOP_D0/CIF_D0/I2C2I/OUPReset the encryption chip1.8V

_SDA_U_1.8V



71GPIO2_D4/SDIO0_BKPWR_D_1.8VI/ODOWNHDMIIN_INT input1.8V
73GPIO2_A2/VOP_D2/CIF_D2_D_ 1.8VI/ODOWNUser Defines LED EN1.8V
75GPIO2_A3/VOP_D3/CIF_D3_D_ 1.8VI/ODOWNHDMIIN power enable 1:Enable 0:Disable1.8V
77GPIO2_A4/VOP_D4/CIF_D4_D_ 1.8VI/ODOWNUART power enable 1:Enable 0:Disable1.8V
79GPIO2_A5/VOP_D5/CIF_D5_D_ 1.8VI/ODOWNLCD hot swap detection1.8V
81GPIO0_A2/WIFI_26MHZ_D_1.8VI/ODOWNHDMI_in IC reset output, active low1.8V
83GPIO2_A7/VOP_D7/CIF_D7/I2C7I/OUPSystem working LED EN1.8V

_SDA_U_1.8V



85GPIO2_B1/SPI2_RXD/CIF_HREF/ I2C6_SDA_U_1.8VI/OUPSPI2_RX1.8V
87GPIO1_A4/ISP0_PRELIGHT_TRIGI/ODOWNLCD panel power enable , Core board internal series resistance 33R 1:Enable 0:Disable3.0V

/ISP1_PRELIGHT_TRIG_D_3.0V



89GNDG
GND
91GPIO2_B2/SPI2_TXD/CIF_CLKINI/OUPSPI2_TX / I2C6_SCL1.8V

/I2C6_SCL_U_1.8V



93GPIO2_B3/SPI2_CLK/VOP_DEN/ CIF_CLKOUTA_U_1.8VI/OUPSPI2_CLK / I2C6_SDA1.8V
95GNDG


97VCC1V8_DVPP
Output Voltage 1.8V, MAX current 150mA1.8V
99VCC2V8_DVPP
Output Voltage 2.8V, MAX current 150mA2.8V
101VCCA(3V-5V)P
Input Voltage 5V, MAX input current 50mA5.0V
103GPIO1_A7/SPI1_RXD/UART4_RX_ U_3.0VI/OUPSPI1_RX3.0V
105GPIO1_B0/SPI1_TXD/UART4_TX_ U_3.0VI/OUPSPI1_TX3.0V
107GPIO1_B1/SPI1_CLK/PMCU_ JTAG_TCK_U_3.0VI/OUPSPI1_CLK3.0V
109GPIO1_B2/SPI1_CSN0/PMCU_ JTAG_TMS_U_3.0VI/OUPSPI1_CS03.0V
111GNDG
GND
113PCIE_RCLK_100M_PO
100MHz differential reference clock out for PCIe peripheral
115PCIE_RCLK_100M_NO
100MHz differential reference clock out for PCIe peripheral
117GNDG
GND
119PCIE_TX0_NO
PCIE differential lane 0 negative output
121PCIE_TX0_PO
PCIE differential lane 0 positive output
123GNDG
GND
125PCIE_RX0_NI
PCIE differential lane 0 negative input
127PCIE_RX0_PI
PCIE differential lane 0 positive input
129GNDG
GND
131PCIE_TX1_NO
PCIE differential lane 1 negative output
133PCIE_TX1_PO
PCIE differential lane 1 positive output
135GNDG
GND
137PCIE_RX1_NI
PCIE differential lane 1 negative input
139PCIE_RX1_PI
PCIE differential lane 1 positive input
141GNDG
GND
143PCIE_TX2_NO
PCIE differential lane 2 negative output
145PCIE_TX2_PO
PCIE differential lane 2 positive output
147GNDG
GND
149PCIE_RX2_NI
PCIE differential lane 2 negative input
151PCIE_RX2_PI
PCIE differential lane 2 positive input
153GNDG
GND
155PCIE_TX3_NO
PCIE differential lane 3 negative output
157PCIE_TX3_PO
PCIE differential lane 3 positive output
159GNDG
GND
161PCIE_RX3_NI
PCIE differential lane 3 negative input
163PCIE_RX3_PI
PCIE differential lane 3 positive input
165GNDG
GND
167GPIO3_C0/MAC_COL/UART3_CTSNI/OUPMIPI to lvds IC power enable 1:Enable 0:Disable3.3V

/SPDIF_TX_U_3.3V



169GPIO0_A1/DDRIO_PWROFF/TCPD_ CCDB_EN_U_1.8VI/OUPPower Management Event IN (active low)1.8V
171GPIO1_B3/I2C4_SDA_U_3.0VI/OUPI2C4_SDA,Core board interiorl pull up Resistor 2.2K3.0V
173GPIO1_B4/I2C4_SCL_U_3.0VI/OUPI2C4_SCL,Core board interiorl pull up Resistor 2.2K3.0V
175GPIO2_A1/VOP_D1/CIF_D1/I2C2I/OUPCamera1 power down control output1.8V

_SCL_U_1.8V



177POWER_ONI
Power on Signal(Power key) Input,active low
179GPIO1_C6/TCPD_VBUS_SOURCE0_ D_3.0VI/ODOWNCamera power enable0 1:Enable 0:Disable3.0V
181GPIO0_A6/PWM3A_IR_D_1.8VI/ODOWNIR receiver input1.8V
183GPIO0_B5/TCPD_VBUS_FDIS/ TCPD_VBUS_SOURCE3_D_ 1.8VI/ODOWNPCIE power enable 1:Enable 0:Disable1.8V
185NPOR_UI
System reset input (Reset key)
187GPIO0_B0/SDMMC0_WRPT/TEST_ CLKOUT2_U_1.8VI/OUPMipi CAMERA reset output, active low1.8V
189GPIO2_D3/SDIO0_PWREN_D_1.8VI/ODOWNMipi to lvds IC reset output, active low1.8V
191GPIO0_A5/EMMC_PWRON_U_1.8VI/OUPPower button press down signal In1.8V
193GPIO1_C4/I2C8_SDA_U_3.0VI/OUPTouch panel interrupt input3.0V
195GPIO4_C7/HDMI_CECINOUT/EDP_ HOTPLUG_U_3.0VI/OUPHDMI CEC communication3.0V
197HDMI_HPDA
HDMI Hot Plug Detection interrupt with 5V tolerance1.8V
199GPIO4_C1/I2C3_SCL/UART2B_TXI/OUPI2C3_SCL,for HDMI, need external pull-up1.8V

_U_1.8V



201GPIO4_C0/I2C3_SDA/UART2B_RXI/OUPI2C3_SDA,for HDMI, need external pull-up1.8V

_U_1.8V



203GPIO3_B2/MAC_RXER/I2C5_SDA_ U_3.3VI/OUPPHY interrupt input , Core board internal series resistance 0R3.3V
205RTC_CLK_OUTI/OUPRTC Clock output1.8V
207GNDG
GND
209GPIO0_A4/SDIO0_INTN_D_1.8VI/ODOWNBT module wake up AP1.8V
211GPIO2_D2/SDIO0_DETN/PCIE_ CLKREQN_U_1.8VI/OUPAP wake up BT module1.8V
213GPIO2_C3/UART0_RTSN_U_1.8VI/OUPUART0 serial port, for BT module1.8V
215GPIO2_C2/UART0_CTSN_U_1.8VI/OUPUART0 serial port, for BT module1.8V
217GPIO2_C1/UART0_TX_U_1.8VI/OUPUART0 serial port, for BT module1.8V
219GPIO2_C0/UART0_RX_U_1.8VI/OUPUART0 serial port, for BT module1.8V

GPIO0_B1/PMUIO2_VOLSEL_D_ 1.8V

BT module power enable, Core board interiorl pull up Resistor 10K
221
I/ODOWN1:Enable 0:Disable1.8V
223GPIO2_C5/SDIO0_D1/SPI5_TXD_ U_1.8VI/OUPSDIO0 data1, for WIFI module1.8V
225GPIO2_C4/SDIO0_D0/SPI5_RXD_ U_1.8VI/OUPSDIO0 data0, for WIFI module1.8V
227GPIO2_C6/SDIO0_D2/SPI5_CLK_ U_1.8VI/OUPSDIO0 data2, for WIFI module1.8V
229GPIO2_C7/SDIO0_D3/SPI5_CSN0I/OUPSDIO0 data3, for WIFI module1.8V

_U_1.8V



231GPIO2_D1/SDIO0_CLKOUT/TEST_ CLKOUT1_U_1.8VI/OUPSDIO0 clock output, for WIFI module1.8V
233GPIO2_D0/SDIO0_CMD_U_1.8VI/OUPSDIO0 command output , for WIFI module1.8V
235GPIO0_A3/SDIO0_WRPT_D_1.8VI/ODOWNWIFI module wake up AP1.8V
237GPIO0_B2_D_1.8VI/ODOWNWIFI module power enable 1:Enable 0:Disable1.8V
239GNDG
GND
241RTC_CLKO_WIFIO
32.768K clock output to WIFI,Core board interiorl pull up Resistor 10K1.8V
243EXT_ENO
External Power enable output, Voltage 5V, active high
245OTP_RSTI
Over temperature protection reset IN, Active low5.0V
247TYPEC1_ID

TYPEC1_ID (no used)
249TYPEC0_ID

TYPEC0_ID (no used)

GPIO1_A2/ISP0_FLASHTRIGIN/ ISP1_FLASHTRIGIN/TCPD_CC1_ VCONN_EN_D_1.8V



251
I/ODOWNWK2124 interrupt input1.8V

GPIO1_A1/ISP0_SHUTTER_TRIG/ ISP1_SHUTTER_TRIG/TCPD_CC0_ VCONN_EN_D_3.0V

LCD panel backlight power enable , Core board internal series resistance 33R
253
I/ODOWN1:Enable 0:Disable3.0V
255GPIO4_C4/UART2C_TX_U_3.0VI/OUPUart2 data output ,for AP debug3.0V
257GPIO4_C3/UART2C_RX_U_3.0VI/OUPUart2 data input, for AP debug3.0V
259GPIO4_D6_DI/ODOWN

261GPIO4_D0/PCIE_CLKREQNB_U_ 3.0VI/OUPPCIe clock request from PCIe peripheral3.0V
263NC----
265GPIO1_D0/TCPD_VBUS_SOURCE2_ D_3.0VI/ODOWNPower off output to MCU, active low3.0V
267GPIO4_C6/PWM1_D_3.0VI/ODOWNPWM1:MIPI_panel backlight brightness control output3.0V
269GPIO4_C2/PWM0/VOP0_PWM/VOP1I/ODOWNPWM0:EDP_panel backlight brightness control output3.0V

_PWM_D_3.0V



271VCCA3V0_CODEC_1P
Output Voltage 3.0V, Max output current 300mA3.0V
273VCCA3V0_CODEC_2P
Output Voltage 3.0V, Max output current 300mA3.0V
275VCCA1V8_CODEC_1P
Output Voltage 1.8V, Max output current 300mA1.8V
277VCCA1V8_CODEC_2P
Output Voltage 1.8V, Max output current 300mA1.8V
279GNDG
GND
281GPIO3_D0/I2S0_SCLK_D_1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
283GPIO3_D1/I2S0_LRCK_RX_D_ 1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
285GPIO3_D2/I2S0_LRCK_TX_D_ 1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
287GPIO3_D3/I2S0_SDI0_D_1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
289GPIO3_D4/I2S0_SDI1SDO3_D_ 1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
291GPIO3_D5/I2S0_SDI2SDO2_D_ 1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
293GPIO3_D6/I2S0_SDI3SDO1_D_ 1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
295GPIO3_D7/I2S0_SDO0_D_1.8VI/ODOWNI2S 0 port, for external audio codec1.8V
297GPIO4_A0/I2S_CLK_D_1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
299GPIO4_A3/I2S1_SCLK_D_1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
301GPIO4_A4/I2S1_LRCK_RX_D_ 1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
303GPIO4_A5/I2S1_LRCK_TX_D_ 1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
305GPIO4_A6/I2S1_SDI0_D_1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
307GPIO4_A7/I2S1_SDO0_D_1.8VI/ODOWNI2S 1 port, to codec ALC56401.8V
309GNDG
GND
311GPIO4_A1/I2C1_SDA_U_1.8VI/OUPI2C1_SDA, Core board interiorl pull up Resistor 2.2K1.8V
313GPIO4_A2/I2C1_SCL_U_1.8VI/OUPI2C1_SCL, Core board interiorl pull up Resistor 2.2K1.8V
314GPIO4_C5/SPDIF_TX_D_3.0VI/ODOWNHeadphone output control, active high3.0V
2GNDG
GND
4GNDG
GND
6GNDG
GND
8GNDG
GND
10GNDG
GND
12GNDG
GND
14GNDG
GND
16GNDG
GND
18GNDG
GND
20NC----
22NC----
24VCC3V3_SYS_1P
Output Voltage 3.3V, Max output current 500mA3.3V
26VCC3V3_SYS_2P
Output Voltage 3.3V, Max output current 500mA3.3V
28VCC3V3_SYS_3P
Output Voltage 3.3V, Max output current 500mA3.3V
30VCC3V3_S3_1P
Output Voltage 3.3V, Max output current 150mA3.3V
32VCC3V3_S3_2P
Output Voltage 3.3V, Max output current 150mA3.3V
34VCC3V3_S3_3P
Output Voltage 3.3V, Max output current 150mA3.3V
36GNDG
GND
38VCC_3V0_1P
Output Voltage 3.0V, Max output current 150mA3.0V
40VCC_3V0_2P
Output Voltage 3.0V, Max output current 150mA3.0V
42VCC_1V8_1P
Output Voltage 1.8V, Max output current 1A1.8V
44VCC_1V8_2P
Output Voltage 1.8V, Max output current 1A1.8V
46VCC_RTCP
RTC Power supply Input Voltage 3.3V-5.5VVCC_RTC





_IN
48VCCA1V8_S3P
Output Voltage 1.8V, Max output current 100mA1.8V
50GNDG
GND
52EDP_AUXNI/O
eDP differential AUX channel negative output(EDP 显示屏)
54EDP_AUXPI/O
eDP differential AUX channel positive output(EDP 显示屏)
56GNDG
GND
58EDP_TX0NO
eDP differential lane 0 negative output(EDP 显示屏)
60EDP_TX0PO
eDP differential lane 0 positive output(EDP 显示屏)
62GNDG
GND
64EDP_TX1NO
eDP differential lane 1 negative output(EDP 显示屏)
66EDP_TX1PO
eDP differential lane 1 positive output(EDP 显示屏)
68GNDG
GND
70EDP_TX2NO
eDP differential lane 2 negative output(EDP 显示屏)
72EDP_TX2PO
eDP differential lane 2 positive output(EDP 显示屏)
74GNDG
GND
76EDP_TX3NO
eDP differential lane 3 negative output(EDP 显示屏)
78EDP_TX3PO
eDP differential lane 3 positive output(EDP 显示屏)
80GNDG
GND
82GPIO1_A3/ISP0_FLASHTRIGOUT/ ISP1_FLASHTRIGOUT_ D_3.0VI/ODOWNTYPEC0 5V output power enable 1:Enable 0:Disable3.0V
84GNDG
GND
86GPIO4_D5_D_3.0VI/ODOWNMIPI_panel reset output3.0V
88GPIO0_A7/SDMMC0_DET_U_1.8VI/OUPSdmmc card detect signal,1.8V




0: TF card insert 1: TF card no insert
90GPIO4_B2/SDMMC0_D2/APJTAG_ TCK_U_1.8V & 3.0VI/OUPSDMMC0 data21.8V &





3.0V
92GPIO4_B3/SDMMC0_D3/APJTAG_ TMS_U_1.8V & 3.0VI/OUPSDMMC0 data31.8V &





3.0V
94GPIO4_B5/SDMMC0_CMD/MCUJTAGI/OUPSDMMC0 command output,1.8V &

_TMS_U_1.8V & 3.0V


3.0V
96GPIO4_B4/SDMMC0_CLKOUT/ MUCJTAG_TCK_D_1.8V& 3.0VI/ODOWNSDMMC0 clock output,1.8V &





3.0V
98GPIO4_B0/SDMMC0_D0/UART2A_ RX_U_1.8V & 3.0VI/OUPSDMMC0 data01.8V &





3.0V
100GPIO4_B1/SDMMC0_D1/UART2A_ TX_U_1.8V & 3.0VI/OUPSDMMC0 data11.8V &





3.0V
102GPIO4_D2_D_3.0VI/ODOWNAP wake up PCIE3.0V
104GPIO1_B5_DI/ODOWN
3.0V
106GPIO4_D1/DP_HOTPLUG_D_3.0VI/ODOWNPcie reset output , , Active low. Core board internal series resistance 0R3.0V

GPIO1_A0/ISP0_SHUTTER_EN/IS P1_SHUTTER_EN/TCPD_VBUS_ SINK_EN_D_3.0V

USB HOST 5V output power enable 1:Enable 0:Disable
108
I/ODOWN
3.0V
110TYPEC0_U2VBUSDETI
TYPEC0 connected / vbus power detect for USB2.0
112TYPEC1_U2VBUSDETI
TYPEC1 connected / vbus power detect for USB2.0 (no used)
114NC----
116GPIO1_C7/TCPD_VBUS_SOURCE1_ D_3.0VI/ODOWNCamera power enable0 1:Enable 0:Disable3.0V
118GPIO2_A6/VOP_D6/CIF_D6_D_ 1.8VI/ODOWN3G power enable 1:Enable 0:Disable1.8V
120GPIO4_D4_D_3.0VIDOWNMIPI_panel Touch pannel interrupt input1.8V
122ADC_IN3_1.8VI
ADC3 input1.8V
124ADC_IN0_1.8VI
ADC0 input1.8V
126ADC_IN1_1.8VI
ADC1 input: RECOVER_KEY input1.8V
128ADC_IN2_1.8VI
ADC2 input1.8V
130GNDG
GND
132HOST1_DM

USB HOST1 Data Minus port
134HOST1_DP

USB HOST1 Data Plus port
136GNDG
GND
138HOST0_DM

USB HOST0 Data Minus port
140HOST0_DP

USB HOST0 Data Plus port
142GNDG
GND
144TYPEC1_AUXP

TYPEC1 AUX differential TX/RX serial data.(no used)
146TYPEC1_AUXM

TYPEC1 AUX differential TX/RX serial data.(no used)
148GNDG
GND
150TYPEC1_TX2M

TYPEC1 negative half of second SuperSpeed TX differential pair.(no used)
152TYPEC1_TX2P

TYPEC1 positive half of second SuperSpeed TX differential pair.(no used)
154GNDG
GND
156TYPEC1_RX2P

TYPEC1 positive half of second SuperSpeed RX differential pair.(no used)
158TYPEC1_RX2M

TYPEC1 negative half of second SuperSpeed RX differential pair.(no used)
160GNDG
GND
162TYPEC1_AUXP_PD_PU

TYPEC1 AUX pull-up/pull-down polarity reversal pins.(no used)
164TYPEC1_AUXM_PU_PD

TYPEC1 AUX pull-up/pull-down polarity reversal pins.(no used)
166TYPEC1_TX1M

TYPEC1 negative half of first Super Speed TX differential pair
168TYPEC1_TX1P

TYPEC1 positive half of first Super Speed TX differential pair.
170TYPEC1_RX1P

TYPEC1 positive half of first Super Speed RX differential pair
172TYPEC1_RX1M

TYPEC1 negative half of first Super Speed RX differential pair
174TYPEC1_DP

USB3 Data Plus port
176TYPEC1_DM

USB3 Data Plus port
178TYPEC0_TX2M

TYPEC0 negative half of first Super Speed TX differential pair
180TYPEC0_TX2P

TYPEC0 positive half of first Super Speed TX differential pair.
182TYPEC0_RX2P

TYPEC0 positive half of first Super Speed RX differential pair
184TYPEC0_RX2M

TYPEC0 negative half of first Super Speed RX differential pair
186TYPEC0_DM

TYPEC0 Data Minus por
188TYPEC0_DP

TYPEC0 Data Plus port
190TYPEC0_TX1M

TYPEC0 negative half of first Super Speed TX differential pair
192TYPEC0_TX1P

TYPEC0 positive half of first Super Speed TX differential pair.
194TYPEC0_RX1P

TYPEC0 positive half of first Super Speed RX differential pair
196TYPEC0_RX1M

TYPEC0 negative half of first Super Speed RX differential pair
198TYPEC0_AUXP

TYPEC0 AUX differential TX/RX serial data
200TYPEC0_AUXM

TYPEC0 AUX differential TX/RX serial data
202TYPEC0_AUXM_PU_PD

TYPEC0 AUX pull-up/pull-down polarityreversal pins.
204TYPEC0_AUXP_PD_PU

TYPEC0 AUX pull-up/pull-down polarityreversal pins.
206GNDG
GND
208HDMI_TX2PO
HDMI channel 2 differential serial data positive
210HDMI_TX2NO
HDMI channel 2 differential serial data negative
212HDMI_TX1PO
HDMI channel 1 differential serial data positive
214HDMI_TX1NO
HDMI channel 1 differential serial data negative
216HDMI_TX0PO
HDMI channel 0 differential serial data positive
218HDMI_TX0NO
HDMI channel 0 differential serial data negative
220HDMI_TCPO
HDMI differential pixel clock positive(HDMI 输出)
222HDMI_TCNO
HDMI differential pixel clock negative(HDMI 输出)
224GNDG
GND
226MIPI_TX0_D0PO
MIPI-DSI0 differential lane 0 positive
228MIPI_TX0_D0NO
MIPI-DSI0 differential lane 0 negativ
230GNDG
GND
232MIPI_TX0_D1PO
MIPI-DSI0 differential lane 1 positive
234MIPI_TX0_D1NO
MIPI-DSI0 differential lane 1 negativ
236GNDG
GND
238MIPI_TX0_CLKPO
MIPI-DSI0 differential clock lane positive
240MIPI_TX0_CLKNO
MIPI-DSI0 differential clock lane negative
242GNDG
GND
244MIPI_TX0_D2PO
MIPI-DSI0 differential lane 2 positive
246MIPI_TX0_D2NO
MIPI-DSI0 differential lane 2 negativ
248GNDG
GND
250MIPI_TX0_D3PO
MIPI-DSI0 differential lane 3 positive
252MIPI_TX0_D3NO
MIPI-DSI0 differential lane 3 negativ
254GNDG
GND
256MIPI_RX0_D0PI
MIPI-CSI0 differential lane 0 positive
258MIPI_RX0_D0NI
MIPI-CSI0 differential lane 0 negative
260GNDG
GND
262MIPI_RX0_D1PI
MIPI-CSI0 differential lane 1 positive
264MIPI_RX0_D1NI
MIPI-CSI0 differential lane 1 negative
266GNDG
GND
268MIPI_RX0_CLKPI
MIPI-CSI0 differential clock lane positive
270MIPI_RX0_CLKNI
MIPI-CSI0 differential clock lane negative
272GNDG
GND
274MIPI_RX0_D2PI
MIPI-CSI0 differential lane 2 positive
276MIPI_RX0_D2NI
MIPI-CSI0 differential lane 2 negative
278GNDG
GND
280MIPI_RX0_D3PI
MIPI-CSI0 differential lane 3 positive
282MIPI_RX0_D3NI
MIPI-CSI0 differential lane 3 negative
284GNDG
GND
286MIPI_TX1/RX1_D3PI/O
MIPI-DSI1/CSI1 differential lane 3 positive
288MIPI_TX1/RX1_D3NI/O
MIPI-DSI1/CSI1 differential lane 3 negative
290GNDG
GND
292MIPI_TX1/RX1_D2PI/O
MIPI-DSI1/CSI1 differential lane 2 positive
294MIPI_TX1/RX1_D2NI/O
MIPI-DSI1/CSI1 differential lane 2 negative
296GNDG
GND
298MIPI_TX1/RX1_CLKPI/O
MIPI-DSI1/CSI1 differential clock lane positive
300MIPI_TX1/RX1_CLKNI/O
MIPI-DSI1/CSI1 differential clock lane negative
302GNDG
GND
304MIPI_TX1/RX1_D1PI/O
MIPI-DSI1/CSI1 differential lane 1 positive
306MIPI_TX1/RX1_D1NI/O
MIPI-DSI1/CSI1 differential lane 1 negative
308GNDG
GND
310MIPI_TX1/RX1_D0PI/O
MIPI-DSI1/CSI1 differential lane 0 positive
312MIPI_TX1/RX1_D0NI/O
MIPI-DSI1/CSI1 differential lane 0 negative






序号类型项目下载链接备注
1规格书规格书下载
2结构图结构图下载提取码: 9tw2
3固件固件下载提取码: fcrn
4屏参屏参下载提取码: jxxk
5工具平台工具下载提取码: yhr9
6认证资料认证资料下载
7APIAPI下载提取码: h559
8视频教程视频教程下载
9系统功能说明书固件烧写流程下载提取码: 9qt8
10串口说明串口说明下载
11双屏异显双屏异显下载
12双屏双触双屏双触下载
13固件修改工具固件修改工具下载提取码: ce7x





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