| Pin | Net Name | Pad type | IO | Defual function description | IO Power domain |
|---|
|
|
| Pull |
|
|
| 1 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 3 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 5 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 7 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 9 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 11 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 13 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 15 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 17 | VCC_SYS | P |
| Input Voltage 4.8V-5.5V | 5.0V |
| 19 | NC | - | - | - | - |
| 21 | NC | - | - | - | - |
| 23 | GND | G |
| GND |
|
| 25 | GPIO3_B3/MAC_CLK/I2C5_SCL_U | I/O | UP | RMII REC_CLK output or GMAC external clock input | 3.3V |
| _3.3V |
|
|
|
|
| 27 | GPIO3_B7/MAC_CRS/CIF_CLKOUT B/UART3_TX_U_3.3V | I/O | UP | PHY Reset | 3.3V |
| 29 | GPIO2_B0/VOP_CLK/CIF_VSYNC/ I2C7_SCL_U_1.8V | I/O | UP | Camera0 power down control output | 1.8V |
| 31 | GPIO3_B5/MAC_MDIO/UART1_TX_ U_3.3V | I/O | UP | MAC management interface data | 3.3V |
| 33 | GPIO3_B0/MAC_MDC/SPI0_CSN1_ U_3.3V | I/O | UP | MAC management interface clock | 3.3V |
| 35 | GPIO0_B4/TCPD_VBUS_BDIS_D_ 1.8V | I/O | DOWN | EDP_panel Touch panel reset output,active low | 1.8V |
| 37 | GND | G |
| GND |
|
| 39 | GPIO3_B4/MAC_TXEN/UART1_RX_ U_3.3V | I/O | UP | MAC transmit enable , Core board internal series resistance 22R | 3.3V |
| 41 | GPIO3_A1/MAC_TXD3/SPI4_TXD_ D_3.3V | I/O | DOWN | MAC TX data, Core board internal series resistance 22R | 3.3V |
| 43 | GPIO3_A0/MAC_TXD2/SPI4_RXD_ D_3.3V | I/O | DOWN | MAC TX data,Core board internal series resistance 22R | 3.3V |
| 45 | GPIO3_A5/MAC_TXD1/SPI0_TXD_ D_3.3V | I/O | DOWN | MAC TX data,Core board internal series resistance 22R | 3.3V |
| 47 | GPIO3_A4/MAC_TXD0/SPI0_RXD_ D_3.3V | I/O | DOWN | MAC TX data,Core board internal series resistance 22R | 3.3V |
| 49 | GPIO3_C1/MAC_TXCLK/UART3_RT SN_U_3.3V | I/O | UP | RGMII TX clock output, Core board internal series resistance 22R | 3.3V |
| 51 | GND | G |
| GND |
|
| 53 | GPIO3_B1/MAC_RXDV_D_3.3V | I/O | DOWN | MAC RX data valid signal | 3.3V |
| 55 | GPIO3_A6/MAC_RXD0/SPI0_CLK_ U_3.3V | I/O | UP | MAC RX data | 3.3V |
| 57 | GPIO3_A7/MAC_RXD1/SPI0_CSN0 | I/O | UP | MAC RX data | 3.3V |
| _U_3.3V |
|
|
|
|
| 59 | GPIO3_A2/MAC_RXD2/SPI4_CLK_ U_3.3V | I/O | UP | MAC RX data | 3.3V |
| 61 | GPIO3_A3/MAC_RXD3/SPI4_CSN0 | I/O | UP | MAC RX data | 3.3V |
| _U_3.3V |
|
|
|
|
| 63 | GPIO3_B6/MAC_RXCLK/UART3_RX | I/O | UP | RGMII RX clock input | 3.3V |
| _U_3.3V |
|
|
|
|
| 65 | GND | G |
| GND |
|
| 67 | GPIO2_B4/SPI2_CSN0_U_1.8V | I/O | UP | SPI2_CS0 | 1.8V |
| 69 | GPIO2_A0/VOP_D0/CIF_D0/I2C2 | I/O | UP | Reset the encryption chip | 1.8V |
| _SDA_U_1.8V |
|
|
|
|
| 71 | GPIO2_D4/SDIO0_BKPWR_D_1.8V | I/O | DOWN | HDMIIN_INT input | 1.8V |
| 73 | GPIO2_A2/VOP_D2/CIF_D2_D_ 1.8V | I/O | DOWN | User Defines LED EN | 1.8V |
| 75 | GPIO2_A3/VOP_D3/CIF_D3_D_ 1.8V | I/O | DOWN | HDMIIN power enable 1:Enable 0:Disable | 1.8V |
| 77 | GPIO2_A4/VOP_D4/CIF_D4_D_ 1.8V | I/O | DOWN | UART power enable 1:Enable 0:Disable | 1.8V |
| 79 | GPIO2_A5/VOP_D5/CIF_D5_D_ 1.8V | I/O | DOWN | LCD hot swap detection | 1.8V |
| 81 | GPIO0_A2/WIFI_26MHZ_D_1.8V | I/O | DOWN | HDMI_in IC reset output, active low | 1.8V |
| 83 | GPIO2_A7/VOP_D7/CIF_D7/I2C7 | I/O | UP | System working LED EN | 1.8V |
| _SDA_U_1.8V |
|
|
|
|
| 85 | GPIO2_B1/SPI2_RXD/CIF_HREF/ I2C6_SDA_U_1.8V | I/O | UP | SPI2_RX | 1.8V |
| 87 | GPIO1_A4/ISP0_PRELIGHT_TRIG | I/O | DOWN | LCD panel power enable ， Core board internal series resistance 33R 1:Enable 0:Disable | 3.0V |
| /ISP1_PRELIGHT_TRIG_D_3.0V |
|
|
|
|
| 89 | GND | G |
| GND |
|
| 91 | GPIO2_B2/SPI2_TXD/CIF_CLKIN | I/O | UP | SPI2_TX / I2C6_SCL | 1.8V |
| /I2C6_SCL_U_1.8V |
|
|
|
|
| 93 | GPIO2_B3/SPI2_CLK/VOP_DEN/ CIF_CLKOUTA_U_1.8V | I/O | UP | SPI2_CLK / I2C6_SDA | 1.8V |
| 95 | GND | G |
|
|
|
| 97 | VCC1V8_DVP | P |
| Output Voltage 1.8V, MAX current 150mA | 1.8V |
| 99 | VCC2V8_DVP | P |
| Output Voltage 2.8V, MAX current 150mA | 2.8V |
| 101 | VCCA(3V-5V) | P |
| Input Voltage 5V, MAX input current 50mA | 5.0V |
| 103 | GPIO1_A7/SPI1_RXD/UART4_RX_ U_3.0V | I/O | UP | SPI1_RX | 3.0V |
| 105 | GPIO1_B0/SPI1_TXD/UART4_TX_ U_3.0V | I/O | UP | SPI1_TX | 3.0V |
| 107 | GPIO1_B1/SPI1_CLK/PMCU_ JTAG_TCK_U_3.0V | I/O | UP | SPI1_CLK | 3.0V |
| 109 | GPIO1_B2/SPI1_CSN0/PMCU_ JTAG_TMS_U_3.0V | I/O | UP | SPI1_CS0 | 3.0V |
| 111 | GND | G |
| GND |
|
| 113 | PCIE_RCLK_100M_P | O |
| 100MHz differential reference clock out for PCIe peripheral |
|
| 115 | PCIE_RCLK_100M_N | O |
| 100MHz differential reference clock out for PCIe peripheral |
|
| 117 | GND | G |
| GND |
|
| 119 | PCIE_TX0_N | O |
| PCIE differential lane 0 negative output |
|
| 121 | PCIE_TX0_P | O |
| PCIE differential lane 0 positive output |
|
| 123 | GND | G |
| GND |
|
| 125 | PCIE_RX0_N | I |
| PCIE differential lane 0 negative input |
|
| 127 | PCIE_RX0_P | I |
| PCIE differential lane 0 positive input |
|
| 129 | GND | G |
| GND |
|
| 131 | PCIE_TX1_N | O |
| PCIE differential lane 1 negative output |
|
| 133 | PCIE_TX1_P | O |
| PCIE differential lane 1 positive output |
|
| 135 | GND | G |
| GND |
|
| 137 | PCIE_RX1_N | I |
| PCIE differential lane 1 negative input |
|
| 139 | PCIE_RX1_P | I |
| PCIE differential lane 1 positive input |
|
| 141 | GND | G |
| GND |
|
| 143 | PCIE_TX2_N | O |
| PCIE differential lane 2 negative output |
|
| 145 | PCIE_TX2_P | O |
| PCIE differential lane 2 positive output |
|
| 147 | GND | G |
| GND |
|
| 149 | PCIE_RX2_N | I |
| PCIE differential lane 2 negative input |
|
| 151 | PCIE_RX2_P | I |
| PCIE differential lane 2 positive input |
|
| 153 | GND | G |
| GND |
|
| 155 | PCIE_TX3_N | O |
| PCIE differential lane 3 negative output |
|
| 157 | PCIE_TX3_P | O |
| PCIE differential lane 3 positive output |
|
| 159 | GND | G |
| GND |
|
| 161 | PCIE_RX3_N | I |
| PCIE differential lane 3 negative input |
|
| 163 | PCIE_RX3_P | I |
| PCIE differential lane 3 positive input |
|
| 165 | GND | G |
| GND |
|
| 167 | GPIO3_C0/MAC_COL/UART3_CTSN | I/O | UP | MIPI to lvds IC power enable 1:Enable 0:Disable | 3.3V |
| /SPDIF_TX_U_3.3V |
|
|
|
|
| 169 | GPIO0_A1/DDRIO_PWROFF/TCPD_ CCDB_EN_U_1.8V | I/O | UP | Power Management Event IN (active low) | 1.8V |
| 171 | GPIO1_B3/I2C4_SDA_U_3.0V | I/O | UP | I2C4_SDA,Core board interiorl pull up Resistor 2.2K | 3.0V |
| 173 | GPIO1_B4/I2C4_SCL_U_3.0V | I/O | UP | I2C4_SCL,Core board interiorl pull up Resistor 2.2K | 3.0V |
| 175 | GPIO2_A1/VOP_D1/CIF_D1/I2C2 | I/O | UP | Camera1 power down control output | 1.8V |
| _SCL_U_1.8V |
|
|
|
|
| 177 | POWER_ON | I |
| Power on Signal(Power key) Input,active low |
|
| 179 | GPIO1_C6/TCPD_VBUS_SOURCE0_ D_3.0V | I/O | DOWN | Camera power enable0 1:Enable 0:Disable | 3.0V |
| 181 | GPIO0_A6/PWM3A_IR_D_1.8V | I/O | DOWN | IR receiver input | 1.8V |
| 183 | GPIO0_B5/TCPD_VBUS_FDIS/ TCPD_VBUS_SOURCE3_D_ 1.8V | I/O | DOWN | PCIE power enable 1:Enable 0:Disable | 1.8V |
| 185 | NPOR_U | I |
| System reset input (Reset key) |
|
| 187 | GPIO0_B0/SDMMC0_WRPT/TEST_ CLKOUT2_U_1.8V | I/O | UP | Mipi CAMERA reset output, active low | 1.8V |
| 189 | GPIO2_D3/SDIO0_PWREN_D_1.8V | I/O | DOWN | Mipi to lvds IC reset output, active low | 1.8V |
| 191 | GPIO0_A5/EMMC_PWRON_U_1.8V | I/O | UP | Power button press down signal In | 1.8V |
| 193 | GPIO1_C4/I2C8_SDA_U_3.0V | I/O | UP | Touch panel interrupt input | 3.0V |
| 195 | GPIO4_C7/HDMI_CECINOUT/EDP_ HOTPLUG_U_3.0V | I/O | UP | HDMI CEC communication | 3.0V |
| 197 | HDMI_HPD | A |
| HDMI Hot Plug Detection interrupt with 5V tolerance | 1.8V |
| 199 | GPIO4_C1/I2C3_SCL/UART2B_TX | I/O | UP | I2C3_SCL,for HDMI, need external pull-up | 1.8V |
| _U_1.8V |
|
|
|
|
| 201 | GPIO4_C0/I2C3_SDA/UART2B_RX | I/O | UP | I2C3_SDA,for HDMI, need external pull-up | 1.8V |
| _U_1.8V |
|
|
|
|
| 203 | GPIO3_B2/MAC_RXER/I2C5_SDA_ U_3.3V | I/O | UP | PHY interrupt input , Core board internal series resistance 0R | 3.3V |
| 205 | RTC_CLK_OUT | I/O | UP | RTC Clock output | 1.8V |
| 207 | GND | G |
| GND |
|
| 209 | GPIO0_A4/SDIO0_INTN_D_1.8V | I/O | DOWN | BT module wake up AP | 1.8V |
| 211 | GPIO2_D2/SDIO0_DETN/PCIE_ CLKREQN_U_1.8V | I/O | UP | AP wake up BT module | 1.8V |
| 213 | GPIO2_C3/UART0_RTSN_U_1.8V | I/O | UP | UART0 serial port, for BT module | 1.8V |
| 215 | GPIO2_C2/UART0_CTSN_U_1.8V | I/O | UP | UART0 serial port, for BT module | 1.8V |
| 217 | GPIO2_C1/UART0_TX_U_1.8V | I/O | UP | UART0 serial port, for BT module | 1.8V |
| 219 | GPIO2_C0/UART0_RX_U_1.8V | I/O | UP | UART0 serial port, for BT module | 1.8V |
| GPIO0_B1/PMUIO2_VOLSEL_D_ 1.8V |
|
| BT module power enable, Core board interiorl pull up Resistor 10K |
|
| 221 |
| I/O | DOWN | 1:Enable 0:Disable | 1.8V |
| 223 | GPIO2_C5/SDIO0_D1/SPI5_TXD_ U_1.8V | I/O | UP | SDIO0 data1, for WIFI module | 1.8V |
| 225 | GPIO2_C4/SDIO0_D0/SPI5_RXD_ U_1.8V | I/O | UP | SDIO0 data0, for WIFI module | 1.8V |
| 227 | GPIO2_C6/SDIO0_D2/SPI5_CLK_ U_1.8V | I/O | UP | SDIO0 data2, for WIFI module | 1.8V |
| 229 | GPIO2_C7/SDIO0_D3/SPI5_CSN0 | I/O | UP | SDIO0 data3, for WIFI module | 1.8V |
| _U_1.8V |
|
|
|
|
| 231 | GPIO2_D1/SDIO0_CLKOUT/TEST_ CLKOUT1_U_1.8V | I/O | UP | SDIO0 clock output, for WIFI module | 1.8V |
| 233 | GPIO2_D0/SDIO0_CMD_U_1.8V | I/O | UP | SDIO0 command output , for WIFI module | 1.8V |
| 235 | GPIO0_A3/SDIO0_WRPT_D_1.8V | I/O | DOWN | WIFI module wake up AP | 1.8V |
| 237 | GPIO0_B2_D_1.8V | I/O | DOWN | WIFI module power enable 1:Enable 0:Disable | 1.8V |
| 239 | GND | G |
| GND |
|
| 241 | RTC_CLKO_WIFI | O |
| 32.768K clock output to WIFI,Core board interiorl pull up Resistor 10K | 1.8V |
| 243 | EXT_EN | O |
| External Power enable output, Voltage 5V, active high |
|
| 245 | OTP_RST | I |
| Over temperature protection reset IN, Active low | 5.0V |
| 247 | TYPEC1_ID |
|
| TYPEC1_ID (no used) |
|
| 249 | TYPEC0_ID |
|
| TYPEC0_ID (no used) |
|
| GPIO1_A2/ISP0_FLASHTRIGIN/ ISP1_FLASHTRIGIN/TCPD_CC1_ VCONN_EN_D_1.8V |
|
|
|
|
| 251 |
| I/O | DOWN | WK2124 interrupt input | 1.8V |
| GPIO1_A1/ISP0_SHUTTER_TRIG/ ISP1_SHUTTER_TRIG/TCPD_CC0_ VCONN_EN_D_3.0V |
|
| LCD panel backlight power enable ， Core board internal series resistance 33R |
|
| 253 |
| I/O | DOWN | 1:Enable 0:Disable | 3.0V |
| 255 | GPIO4_C4/UART2C_TX_U_3.0V | I/O | UP | Uart2 data output ,for AP debug | 3.0V |
| 257 | GPIO4_C3/UART2C_RX_U_3.0V | I/O | UP | Uart2 data input, for AP debug | 3.0V |
| 259 | GPIO4_D6_D | I/O | DOWN |
|
|
| 261 | GPIO4_D0/PCIE_CLKREQNB_U_ 3.0V | I/O | UP | PCIe clock request from PCIe peripheral | 3.0V |
| 263 | NC | - | - | - | - |
| 265 | GPIO1_D0/TCPD_VBUS_SOURCE2_ D_3.0V | I/O | DOWN | Power off output to MCU, active low | 3.0V |
| 267 | GPIO4_C6/PWM1_D_3.0V | I/O | DOWN | PWM1:MIPI_panel backlight brightness control output | 3.0V |
| 269 | GPIO4_C2/PWM0/VOP0_PWM/VOP1 | I/O | DOWN | PWM0:EDP_panel backlight brightness control output | 3.0V |
| _PWM_D_3.0V |
|
|
|
|
| 271 | VCCA3V0_CODEC_1 | P |
| Output Voltage 3.0V, Max output current 300mA | 3.0V |
| 273 | VCCA3V0_CODEC_2 | P |
| Output Voltage 3.0V, Max output current 300mA | 3.0V |
| 275 | VCCA1V8_CODEC_1 | P |
| Output Voltage 1.8V, Max output current 300mA | 1.8V |
| 277 | VCCA1V8_CODEC_2 | P |
| Output Voltage 1.8V, Max output current 300mA | 1.8V |
| 279 | GND | G |
| GND |
|
| 281 | GPIO3_D0/I2S0_SCLK_D_1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 283 | GPIO3_D1/I2S0_LRCK_RX_D_ 1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 285 | GPIO3_D2/I2S0_LRCK_TX_D_ 1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 287 | GPIO3_D3/I2S0_SDI0_D_1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 289 | GPIO3_D4/I2S0_SDI1SDO3_D_ 1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 291 | GPIO3_D5/I2S0_SDI2SDO2_D_ 1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 293 | GPIO3_D6/I2S0_SDI3SDO1_D_ 1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 295 | GPIO3_D7/I2S0_SDO0_D_1.8V | I/O | DOWN | I2S 0 port, for external audio codec | 1.8V |
| 297 | GPIO4_A0/I2S_CLK_D_1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 299 | GPIO4_A3/I2S1_SCLK_D_1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 301 | GPIO4_A4/I2S1_LRCK_RX_D_ 1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 303 | GPIO4_A5/I2S1_LRCK_TX_D_ 1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 305 | GPIO4_A6/I2S1_SDI0_D_1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 307 | GPIO4_A7/I2S1_SDO0_D_1.8V | I/O | DOWN | I2S 1 port, to codec ALC5640 | 1.8V |
| 309 | GND | G |
| GND |
|
| 311 | GPIO4_A1/I2C1_SDA_U_1.8V | I/O | UP | I2C1_SDA, Core board interiorl pull up Resistor 2.2K | 1.8V |
| 313 | GPIO4_A2/I2C1_SCL_U_1.8V | I/O | UP | I2C1_SCL, Core board interiorl pull up Resistor 2.2K | 1.8V |
| 314 | GPIO4_C5/SPDIF_TX_D_3.0V | I/O | DOWN | Headphone output control, active high | 3.0V |
| 2 | GND | G |
| GND |
|
| 4 | GND | G |
| GND |
|
| 6 | GND | G |
| GND |
|
| 8 | GND | G |
| GND |
|
| 10 | GND | G |
| GND |
|
| 12 | GND | G |
| GND |
|
| 14 | GND | G |
| GND |
|
| 16 | GND | G |
| GND |
|
| 18 | GND | G |
| GND |
|
| 20 | NC | - | - | - | - |
| 22 | NC | - | - | - | - |
| 24 | VCC3V3_SYS_1 | P |
| Output Voltage 3.3V, Max output current 500mA | 3.3V |
| 26 | VCC3V3_SYS_2 | P |
| Output Voltage 3.3V, Max output current 500mA | 3.3V |
| 28 | VCC3V3_SYS_3 | P |
| Output Voltage 3.3V, Max output current 500mA | 3.3V |
| 30 | VCC3V3_S3_1 | P |
| Output Voltage 3.3V, Max output current 150mA | 3.3V |
| 32 | VCC3V3_S3_2 | P |
| Output Voltage 3.3V, Max output current 150mA | 3.3V |
| 34 | VCC3V3_S3_3 | P |
| Output Voltage 3.3V, Max output current 150mA | 3.3V |
| 36 | GND | G |
| GND |
|
| 38 | VCC_3V0_1 | P |
| Output Voltage 3.0V, Max output current 150mA | 3.0V |
| 40 | VCC_3V0_2 | P |
| Output Voltage 3.0V, Max output current 150mA | 3.0V |
| 42 | VCC_1V8_1 | P |
| Output Voltage 1.8V, Max output current 1A | 1.8V |
| 44 | VCC_1V8_2 | P |
| Output Voltage 1.8V, Max output current 1A | 1.8V |
| 46 | VCC_RTC | P |
| RTC Power supply Input Voltage 3.3V-5.5V | VCC_RTC |
|
|
|
|
| _IN |
| 48 | VCCA1V8_S3 | P |
| Output Voltage 1.8V, Max output current 100mA | 1.8V |
| 50 | GND | G |
| GND |
|
| 52 | EDP_AUXN | I/O |
| eDP differential AUX channel negative output（EDP 显示屏） |
|
| 54 | EDP_AUXP | I/O |
| eDP differential AUX channel positive output（EDP 显示屏） |
|
| 56 | GND | G |
| GND |
|
| 58 | EDP_TX0N | O |
| eDP differential lane 0 negative output（EDP 显示屏） |
|
| 60 | EDP_TX0P | O |
| eDP differential lane 0 positive output（EDP 显示屏） |
|
| 62 | GND | G |
| GND |
|
| 64 | EDP_TX1N | O |
| eDP differential lane 1 negative output（EDP 显示屏） |
|
| 66 | EDP_TX1P | O |
| eDP differential lane 1 positive output（EDP 显示屏） |
|
| 68 | GND | G |
| GND |
|
| 70 | EDP_TX2N | O |
| eDP differential lane 2 negative output（EDP 显示屏） |
|
| 72 | EDP_TX2P | O |
| eDP differential lane 2 positive output（EDP 显示屏） |
|
| 74 | GND | G |
| GND |
|
| 76 | EDP_TX3N | O |
| eDP differential lane 3 negative output（EDP 显示屏） |
|
| 78 | EDP_TX3P | O |
| eDP differential lane 3 positive output（EDP 显示屏） |
|
| 80 | GND | G |
| GND |
|
| 82 | GPIO1_A3/ISP0_FLASHTRIGOUT/ ISP1_FLASHTRIGOUT_ D_3.0V | I/O | DOWN | TYPEC0 5V output power enable 1:Enable 0:Disable | 3.0V |
| 84 | GND | G |
| GND |
|
| 86 | GPIO4_D5_D_3.0V | I/O | DOWN | MIPI_panel reset output | 3.0V |
| 88 | GPIO0_A7/SDMMC0_DET_U_1.8V | I/O | UP | Sdmmc card detect signal, | 1.8V |
|
|
|
| 0: TF card insert 1: TF card no insert |
|
| 90 | GPIO4_B2/SDMMC0_D2/APJTAG_ TCK_U_1.8V & 3.0V | I/O | UP | SDMMC0 data2 | 1.8V & |
|
|
|
|
| 3.0V |
| 92 | GPIO4_B3/SDMMC0_D3/APJTAG_ TMS_U_1.8V & 3.0V | I/O | UP | SDMMC0 data3 | 1.8V & |
|
|
|
|
| 3.0V |
| 94 | GPIO4_B5/SDMMC0_CMD/MCUJTAG | I/O | UP | SDMMC0 command output, | 1.8V & |
| _TMS_U_1.8V & 3.0V |
|
|
| 3.0V |
| 96 | GPIO4_B4/SDMMC0_CLKOUT/ MUCJTAG_TCK_D_1.8V& 3.0V | I/O | DOWN | SDMMC0 clock output, | 1.8V & |
|
|
|
|
| 3.0V |
| 98 | GPIO4_B0/SDMMC0_D0/UART2A_ RX_U_1.8V & 3.0V | I/O | UP | SDMMC0 data0 | 1.8V & |
|
|
|
|
| 3.0V |
| 100 | GPIO4_B1/SDMMC0_D1/UART2A_ TX_U_1.8V & 3.0V | I/O | UP | SDMMC0 data1 | 1.8V & |
|
|
|
|
| 3.0V |
| 102 | GPIO4_D2_D_3.0V | I/O | DOWN | AP wake up PCIE | 3.0V |
| 104 | GPIO1_B5_D | I/O | DOWN |
| 3.0V |
| 106 | GPIO4_D1/DP_HOTPLUG_D_3.0V | I/O | DOWN | Pcie reset output , , Active low. Core board internal series resistance 0R | 3.0V |
| GPIO1_A0/ISP0_SHUTTER_EN/IS P1_SHUTTER_EN/TCPD_VBUS_ SINK_EN_D_3.0V |
|
| USB HOST 5V output power enable 1:Enable 0:Disable |
|
| 108 |
| I/O | DOWN |
| 3.0V |
| 110 | TYPEC0_U2VBUSDET | I |
| TYPEC0 connected / vbus power detect for USB2.0 |
|
| 112 | TYPEC1_U2VBUSDET | I |
| TYPEC1 connected / vbus power detect for USB2.0 (no used) |
|
| 114 | NC | - | - | - | - |
| 116 | GPIO1_C7/TCPD_VBUS_SOURCE1_ D_3.0V | I/O | DOWN | Camera power enable0 1:Enable 0:Disable | 3.0V |
| 118 | GPIO2_A6/VOP_D6/CIF_D6_D_ 1.8V | I/O | DOWN | 3G power enable 1:Enable 0:Disable | 1.8V |
| 120 | GPIO4_D4_D_3.0V | I | DOWN | MIPI_panel Touch pannel interrupt input | 1.8V |
| 122 | ADC_IN3_1.8V | I |
| ADC3 input | 1.8V |
| 124 | ADC_IN0_1.8V | I |
| ADC0 input | 1.8V |
| 126 | ADC_IN1_1.8V | I |
| ADC1 input: RECOVER_KEY input | 1.8V |
| 128 | ADC_IN2_1.8V | I |
| ADC2 input | 1.8V |
| 130 | GND | G |
| GND |
|
| 132 | HOST1_DM |
|
| USB HOST1 Data Minus port |
|
| 134 | HOST1_DP |
|
| USB HOST1 Data Plus port |
|
| 136 | GND | G |
| GND |
|
| 138 | HOST0_DM |
|
| USB HOST0 Data Minus port |
|
| 140 | HOST0_DP |
|
| USB HOST0 Data Plus port |
|
| 142 | GND | G |
| GND |
|
| 144 | TYPEC1_AUXP |
|
| TYPEC1 AUX differential TX/RX serial data.(no used) |
|
| 146 | TYPEC1_AUXM |
|
| TYPEC1 AUX differential TX/RX serial data.(no used) |
|
| 148 | GND | G |
| GND |
|
| 150 | TYPEC1_TX2M |
|
| TYPEC1 negative half of second SuperSpeed TX differential pair.(no used) |
|
| 152 | TYPEC1_TX2P |
|
| TYPEC1 positive half of second SuperSpeed TX differential pair.(no used) |
|
| 154 | GND | G |
| GND |
|
| 156 | TYPEC1_RX2P |
|
| TYPEC1 positive half of second SuperSpeed RX differential pair.(no used) |
|
| 158 | TYPEC1_RX2M |
|
| TYPEC1 negative half of second SuperSpeed RX differential pair.(no used) |
|
| 160 | GND | G |
| GND |
|
| 162 | TYPEC1_AUXP_PD_PU |
|
| TYPEC1 AUX pull-up/pull-down polarity reversal pins.(no used) |
|
| 164 | TYPEC1_AUXM_PU_PD |
|
| TYPEC1 AUX pull-up/pull-down polarity reversal pins.(no used) |
|
| 166 | TYPEC1_TX1M |
|
| TYPEC1 negative half of first Super Speed TX differential pair |
|
| 168 | TYPEC1_TX1P |
|
| TYPEC1 positive half of first Super Speed TX differential pair. |
|
| 170 | TYPEC1_RX1P |
|
| TYPEC1 positive half of first Super Speed RX differential pair |
|
| 172 | TYPEC1_RX1M |
|
| TYPEC1 negative half of first Super Speed RX differential pair |
|
| 174 | TYPEC1_DP |
|
| USB3 Data Plus port |
|
| 176 | TYPEC1_DM |
|
| USB3 Data Plus port |
|
| 178 | TYPEC0_TX2M |
|
| TYPEC0 negative half of first Super Speed TX differential pair |
|
| 180 | TYPEC0_TX2P |
|
| TYPEC0 positive half of first Super Speed TX differential pair. |
|
| 182 | TYPEC0_RX2P |
|
| TYPEC0 positive half of first Super Speed RX differential pair |
|
| 184 | TYPEC0_RX2M |
|
| TYPEC0 negative half of first Super Speed RX differential pair |
|
| 186 | TYPEC0_DM |
|
| TYPEC0 Data Minus por |
|
| 188 | TYPEC0_DP |
|
| TYPEC0 Data Plus port |
|
| 190 | TYPEC0_TX1M |
|
| TYPEC0 negative half of first Super Speed TX differential pair |
|
| 192 | TYPEC0_TX1P |
|
| TYPEC0 positive half of first Super Speed TX differential pair. |
|
| 194 | TYPEC0_RX1P |
|
| TYPEC0 positive half of first Super Speed RX differential pair |
|
| 196 | TYPEC0_RX1M |
|
| TYPEC0 negative half of first Super Speed RX differential pair |
|
| 198 | TYPEC0_AUXP |
|
| TYPEC0 AUX differential TX/RX serial data |
|
| 200 | TYPEC0_AUXM |
|
| TYPEC0 AUX differential TX/RX serial data |
|
| 202 | TYPEC0_AUXM_PU_PD |
|
| TYPEC0 AUX pull-up/pull-down polarityreversal pins. |
|
| 204 | TYPEC0_AUXP_PD_PU |
|
| TYPEC0 AUX pull-up/pull-down polarityreversal pins. |
|
| 206 | GND | G |
| GND |
|
| 208 | HDMI_TX2P | O |
| HDMI channel 2 differential serial data positive |
|
| 210 | HDMI_TX2N | O |
| HDMI channel 2 differential serial data negative |
|
| 212 | HDMI_TX1P | O |
| HDMI channel 1 differential serial data positive |
|
| 214 | HDMI_TX1N | O |
| HDMI channel 1 differential serial data negative |
|
| 216 | HDMI_TX0P | O |
| HDMI channel 0 differential serial data positive |
|
| 218 | HDMI_TX0N | O |
| HDMI channel 0 differential serial data negative |
|
| 220 | HDMI_TCP | O |
| HDMI differential pixel clock positive（HDMI 输出） |
|
| 222 | HDMI_TCN | O |
| HDMI differential pixel clock negative（HDMI 输出） |
|
| 224 | GND | G |
| GND |
|
| 226 | MIPI_TX0_D0P | O |
| MIPI-DSI0 differential lane 0 positive |
|
| 228 | MIPI_TX0_D0N | O |
| MIPI-DSI0 differential lane 0 negativ |
|
| 230 | GND | G |
| GND |
|
| 232 | MIPI_TX0_D1P | O |
| MIPI-DSI0 differential lane 1 positive |
|
| 234 | MIPI_TX0_D1N | O |
| MIPI-DSI0 differential lane 1 negativ |
|
| 236 | GND | G |
| GND |
|
| 238 | MIPI_TX0_CLKP | O |
| MIPI-DSI0 differential clock lane positive |
|
| 240 | MIPI_TX0_CLKN | O |
| MIPI-DSI0 differential clock lane negative |
|
| 242 | GND | G |
| GND |
|
| 244 | MIPI_TX0_D2P | O |
| MIPI-DSI0 differential lane 2 positive |
|
| 246 | MIPI_TX0_D2N | O |
| MIPI-DSI0 differential lane 2 negativ |
|
| 248 | GND | G |
| GND |
|
| 250 | MIPI_TX0_D3P | O |
| MIPI-DSI0 differential lane 3 positive |
|
| 252 | MIPI_TX0_D3N | O |
| MIPI-DSI0 differential lane 3 negativ |
|
| 254 | GND | G |
| GND |
|
| 256 | MIPI_RX0_D0P | I |
| MIPI-CSI0 differential lane 0 positive |
|
| 258 | MIPI_RX0_D0N | I |
| MIPI-CSI0 differential lane 0 negative |
|
| 260 | GND | G |
| GND |
|
| 262 | MIPI_RX0_D1P | I |
| MIPI-CSI0 differential lane 1 positive |
|
| 264 | MIPI_RX0_D1N | I |
| MIPI-CSI0 differential lane 1 negative |
|
| 266 | GND | G |
| GND |
|
| 268 | MIPI_RX0_CLKP | I |
| MIPI-CSI0 differential clock lane positive |
|
| 270 | MIPI_RX0_CLKN | I |
| MIPI-CSI0 differential clock lane negative |
|
| 272 | GND | G |
| GND |
|
| 274 | MIPI_RX0_D2P | I |
| MIPI-CSI0 differential lane 2 positive |
|
| 276 | MIPI_RX0_D2N | I |
| MIPI-CSI0 differential lane 2 negative |
|
| 278 | GND | G |
| GND |
|
| 280 | MIPI_RX0_D3P | I |
| MIPI-CSI0 differential lane 3 positive |
|
| 282 | MIPI_RX0_D3N | I |
| MIPI-CSI0 differential lane 3 negative |
|
| 284 | GND | G |
| GND |
|
| 286 | MIPI_TX1/RX1_D3P | I/O |
| MIPI-DSI1/CSI1 differential lane 3 positive |
|
| 288 | MIPI_TX1/RX1_D3N | I/O |
| MIPI-DSI1/CSI1 differential lane 3 negative |
|
| 290 | GND | G |
| GND |
|
| 292 | MIPI_TX1/RX1_D2P | I/O |
| MIPI-DSI1/CSI1 differential lane 2 positive |
|
| 294 | MIPI_TX1/RX1_D2N | I/O |
| MIPI-DSI1/CSI1 differential lane 2 negative |
|
| 296 | GND | G |
| GND |
|
| 298 | MIPI_TX1/RX1_CLKP | I/O |
| MIPI-DSI1/CSI1 differential clock lane positive |
|
| 300 | MIPI_TX1/RX1_CLKN | I/O |
| MIPI-DSI1/CSI1 differential clock lane negative |
|
| 302 | GND | G |
| GND |
|
| 304 | MIPI_TX1/RX1_D1P | I/O |
| MIPI-DSI1/CSI1 differential lane 1 positive |
|
| 306 | MIPI_TX1/RX1_D1N | I/O |
| MIPI-DSI1/CSI1 differential lane 1 negative |
|
| 308 | GND | G |
| GND |
|
| 310 | MIPI_TX1/RX1_D0P | I/O |
| MIPI-DSI1/CSI1 differential lane 0 positive |
|
| 312 | MIPI_TX1/RX1_D0N | I/O |
| MIPI-DSI1/CSI1 differential lane 0 negative |
|
|
|
|
|
|
|
